Credit: Columbia Engineering
Columbia Engineering researchers accomplished this world record power output level for CMOS-based power amplifiers by developing a chip design methodology that stacks several nanoscale CMOS devices on top of each other so that they can handle larger voltages without compromising their speed. By stacking four 45-nanometer CMOS transistors within a power amplifier and then combining eight such amplifiers on a single chip, they achieved output power levels of nearly 0.5 W at 45 gigahertz.